1. Field of the Disclosure
This disclosure relates generally to non-volatile memories (NVMs), and more specifically, to NVMs that include block-size-aware program/erase operations.
2. Description of the Related Art
Typical non-volatile memories (NVMs) use charge pumps for generating program/erase voltages to apply to the memory cells during program and erase operations. The voltages selected for program and erase operations are based on desirable characteristics for the threshold voltage distribution and the program and erase performance of the cells that are programmed or erased. For a given NVM, there is a determined charge pump voltage for program and erase for each relevant node. For erase this is typically the gate voltage and the well voltage. For programming this is typically the gate voltage and the drain voltage. Due to the possible voltage drop caused by the leakage current between the charge pumps and the memory cells, the intended charge pump voltage may not be delivered to memory cells. NVM typically consists of blocks with different array sizes, i.e., number of memory cells. The leakage current will be different for different block sizes and will thereby result in different program and erase biases applied to the memory cells even with the same charge pump voltage setting. This will in turn result in different program/erase performance and threshold voltage distributions after the program and erase operation on blocks with different block sizes. If the magnitudes of the biases to the memory cells are too high, the extent of the programming or erase is larger than necessary and eventually impacts endurance. On the other hand, if the magnitudes of the biases to the memory cells are too low, the time required to perform the program or erase is longer than necessary. Moreover, the variation of the threshold voltage range of the bit cells for different block sizes will likely cause different data retention characteristics for different block sizes. Thus, the charge pump voltage conditions for program or erase of NVM blocks of different sizes to ensure consistent biases seen by memory cells and hence ensure consistent program/erase performance and reliability bear on the life of the memory and program/erase time. In addition, temperature will also impact the leakage current. Typically leakage current will be higher at a higher temperature. Thus, temperature will also need to be taken into consideration when choosing charge pump voltages conditions.
Thus there is a need for program/erase operations that improve upon one or more the issues raised above.